FPGA implementation of environment/noise classification using neural networks

dc.accession.numberT00362
dc.classification.ddc006.32 AMB
dc.contributor.advisorZaveri, Mazad S
dc.contributor.authorAmbasana, Nikita B.
dc.date.accessioned2017-06-10T14:39:57Z
dc.date.accessioned2025-06-28T10:20:49Z
dc.date.available2017-06-10T14:39:57Z
dc.date.issued2012
dc.degreeM. Tech
dc.description.abstractThe purpose of this thesis is to give an insight into the implementation of a system of neural networks, for the tasks of Noise/Environment Modeling, Feature Extraction and Classification of Noise/Environment, on a Field Programmable Gate Array (FPGA). A methodology for creating baseline architecture for a new system of neural networks has been followed, to give worst case estimates. After necessary analysis an estimate of hardware utilization, within a specific FPGA (XC3S250E Spartan 3E Device) and the Time for Computation, for each of the machines used, is given. It also summarizes the Performance-Price Ratio in terms of Time of Computation and Hardware for Logic simplementation, for different degrees of parallelism in the system.
dc.identifier.citationAmbasana, Nikita B. (2012). FPGA implementation of environment/noise classification using neural networks. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 42 p. (Acc.No: T00362)
dc.identifier.urihttp://ir.daiict.ac.in/handle/123456789/399
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.student.id201011031
dc.subjectFPGA
dc.subjectField Programmable Gate Array
dc.subjectNeural networks
dc.titleFPGA implementation of environment/noise classification using neural networks
dc.typeDissertation

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