Theses and Dissertations

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Now showing 1 - 6 of 6
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    Development of difference detection algorithm for surveillance video compression
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2011) Marvaniya, Hitul D.; Banerjee, Asim
    Video surveillance is widely used tool in today’s era for improving public and residential safety. Here the size of the video data is much higher due to large number of surveillance cameras scattered over large area and data needs to be saved for longer time. Thus various compression schemes needs to be implemented to reduce the size of the data. Currently H.264/AVC is widely used as a compression for video surveillance. The computational complexity of H.264/AVC is higher. So the surveillance system is going to be computationally complex and more time consuming. The difference detection algorithm is working as a preprocessing module before video encoder to reduce the complexity of video compression. As proposed algorithm is completely independent from compression module of H.264, it has high adaptability to work with any existing H.264 video encoder to save the cost of implementation.
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    ItemOpen Access
    Hardware implementation of multiband and multimode modem for software defined radio/ cognitive radio
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2011) Buddhbhatti, Dixit K.; Dubey, Rahul
    Present day programmable hardware and SDR (Software Defined Radio) have enabled radio processing to switch from analog to digital. The work presented here describes a method of designing a multiband & multimode modulator for SDR/ CR (Cognitive Radio) and its implementation on programmable hardware, such as FPGA (Field Programmable Gate Array). SDR has become a most important topic of research in the field of satellite communication. The prototype presented here shows ability to dynamically alter modulation and demodulation scheme in a Satellite Communication (Satcom) terminal to suit given conditional requirements. The Cognitive module will decide which modulation scheme and frequency band has to be used for signal transmission. Cognitive module provides control bit to select the modulation scheme and operating frequency. The work presented here demonstrates a practical design and implementation procedure for modem used in SDR/ CR platform and gives detailed description of the baseband signal processing logic design in the FPGA.
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    Efficient ASIC implementation of advanced encryption standard
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Joshi, Ashwini Kumar; Nagchoudhuri, Dipankar
    In spite of the many defense techniques, software vulnerabilities like buffer overflow, format string vulnerability and integer vulnerability is still exploited by attackers. These software vulnerabilities arise due to programming mistakes which allows security bugs to be exploited. Buffer overflow occurs when buffer is given more data than the capacity of it. Format string vulnerability arises when data supplied by attacker is passed to formatting functions as format string argument. Integer vulnerability occurs when program evaluates an integer to unexpected value due to integer overflows, underflows, truncation errors or signed conversion errors. The hardware based solution called tagged architecture protects a system against mentioned vulnerabilities. In tagged architecture, each memory byte is appended with one tag bit to mark data that comes from I/O. Whenever I/O supplied data is used to transfer control of a system or to access memory, an alert is raised and program is terminated. This thesis proposes a weakness of tagged architecture by finding false positives and false negatives on it. It also proposes the improvements to the tagged architecture to avoid found false positives on it. The prototype implementation of improved tagged architecture is done in SimpleScalar simulator. The SimpleScalar simulator is a architectural simulator. The security evaluation is done for tagged architecture and improved tagged architecture through benchmarks and synthetic vulnerable programs.
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    Video compression using color transfer based on motion estimation
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Reddy, Pandu Ranga M.; Mitra, Suman K.
    Many compression techniques were developed in last decade and are being used in many applications like HDTV, Videoconferencing, Videophone, multimedia work stations and mobile image communications. It is also certain that digital video will have a significant economic impact on the computer, telecommunications, and imaging industries. Compression that is obtained by standard compression schemes for color video can be further increased if we can take the advantage of color information of successive images of a scene. The color of the objects in the present frame will be almost similar to the color of it in previous frame. So color can be applied at decoder, even if the information is not known for all frames of a scene. The main objective of this thesis is to propose schemes for different profiles of MPEG-2 which uses color transfer techniques. The proposed schemes are tested with different sequences and are compared with the MPEG-2 coded sequences.
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    Low cost design of IFFT module for dolby AC-3 decoder
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Gupta, Akshay Kumar; Dubey, Rahul
    Dolby AC-3 is a flexible audio data compression technology capable of encoding a range of audio channel formats into a low rate bit stream. AC-3 is the de facto audio standard for high-end digital consumer multimedia equipment. In this thesis work we have implemented 8 point FFT module using radix-2 algorithm. This work also shows the implementation of 128 point IFFT module using split radix algorithm.
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    Model based channel shortening technique for IEEE 802.11a OFDM system
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2007) Patidar, Pravin; Chakka, Vijaykumar
    Channel shortening tehniques for IEEE802.11a OFDM system are studied. Their performance is evaluated for various standard channel models. A model based channel shortening technique is presented, which reduces the computational comlexity, both during initialization and data transmission. The method is based on modeling of channel impulse response by a pole-zero system, and using the denominator coefficients as the equalizer. Further, it is shown that for channel shortening, calculation of zeros of the model is not required. Comparison of proposed technique with MMSE and MSSNR channel shortening techniques is presented.