Theses and Dissertations

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Subject: search.filters.subject.Analogue Front-End Architecture

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    Design and layout of single bit per stage pipelined ADC
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2011) Chaora, Ankeet; Sen, Subhajit
    The concept of pipe-lining, often used in digital circuits, can also be applied in the analog domain. It helps to achieve higher speed where several operations must be performed serially. In this work, pipe-lining is employed to create the analog-to-digital converter. The architecture consists of N stages, each including a sample and hold circuit, an ADC, a DAC, a sub tractor and possibly an amplifier. In actual implementation we combine two or more of these functions in one circuit. By pipe-lining, in the converter an optimization can be obtained between maximum sampling clock and the speed of the circuits used. The layout of simulated pipe-lined ADC has been created and parasitic have been extracted. Rigorous pre-layout and post-layout simulations have been done and obtained results are analyzed. The single bit per stage pipe-lined ADC has been implemented in UMC 180nm technology and simulated in Cadence Virtuoso Environment.
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    Adaptive analog line driver using digital tuning
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2010) Singh, Harsh Verdhan; Sen, Subhajit
    Transmission lines are widely used for transmitting electrical signals. A line driver is a part of the analog front-end transmitter for wired line communication. It is a voltage buffer that provides the necessary output current to drive the small load impedance of a terminated transmission line. The adaptive line driver must adapt to the load impedance of a terminated transmission line for minimizing reflections. The main requirements of an adaptive line driver are good matching to the input impedance of the transmission line over process variations, high output swing, unity gain. Existing adaptive line drivers use analog tuning methods for adapting to the load impedance. This thesis proposes a new technique for tuning output impedance of the line driver. A digital tuning method is used to correct the output impedance of the line driver to match with the input impedance of the transmission line. The aim of using the digital tuning method is to achieve better tuning range over existing analog tuning methods. The tuning scheme uses a comparator followed by counter and current DAC(digital- to-analog converter). A comparator is used for comparing input and output signal of line driver and generates control signal which is applied to a counter that controls the current DAC. This feedback loop ensures unity gain between the input and out- put voltages and thereby ensures tuning of the output impedance of the line driver. The analog line driver is implemented in GPDK-180nm technology and simulated in Cadence Virtuoso Environment.