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Analysis of tracking distortion in bootstrapped gate MOSFET sample-hold circuits and a method for its minimization

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dc.contributor.affiliationSen, Subhajit
dc.contributor.authorSen, Subhajit
dc.date.accessioned2025-08-01T13:09:24Z
dc.date.issued01-01-2011
dc.format.extent29- 38
dc.identifier.citationSen, Subhajit, "Analysis of tracking distortion in bootstrapped gate MOSFET sample-hold circuits and a method for its minimization," IETE Journal of Research, Vol. 57, no. 1, Jan.-Feb.2011, pp. 29- 38. Doi: 10.4103%2F0377-2063.78326
dc.identifier.doi10.4103/0377-2063.78326
dc.identifier.issn0974-780X
dc.identifier.scopus2-s2.0-79953787921
dc.identifier.urihttps://ir.daiict.ac.in/handle/dau.ir/1911
dc.identifier.wosWOS:000289204100004
dc.language.isoen
dc.publisherTaylor&Francis
dc.relation.ispartofseriesVol. 57; No. 1
dc.sourceIETE Journal of Research
dc.source.urihttps://www.tandfonline.com/doi/abs/10.4103/0377-2063.78326
dc.titleAnalysis of tracking distortion in bootstrapped gate MOSFET sample-hold circuits and a method for its minimization
dspace.entity.typePublication

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