Light-weight configurable architecture for QRS detection

Abstract

In this study, the authors present a configurable architecture having gate count of ?3.2??? and on the fly reconfigurability for low-power biomedical applications such as QRS detection, ExG processing etc. The proposed architecture is a light-weight co-processor that supports on-node digital signal and image processing functions potentially eliminating the power consumed by radios in wireless sensor node and body sensor network. The architecture consists of a 3?�?3 array of register units along with adaptive memory with configurable data path. The architecture can be configured on-the-fly for seven functions with the current memory structure. However, more number of functions can be targeted with increased memory. They demonstrate the realisation of Pan�Tompkins algorithm commonly used for QRS detection on the proposed architecture using the reconfigurability. This work offers ?4� reduced area and 2.3� increase in performance with respect to the existing contemporary literature.