Theses and Dissertations

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    Executable specification design and simulation of OFDM based communication system
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2009) Sa, Sudhir Kumar; Dubey, Rahul
    The communication system using the OFDM principle is today one of the most important application in communication field. This system has various applications from broadband to 3G and digital TV to Radio LANs. This master’s thesis project deals with the implementation of certain specification, algorithmic exploration for WVAN (wireless video area network) in Simulink®. The implemented model and its specification is the reference for the hardware designing and verification. The model used in OFDM based QPSK/16-QAM modulated communication system for the WHD WVAN standard at the High Rate Physical (HRP) layer. This thesis project describes the functionality of the various communication blocks and the method of data transmission through these blocks. The main purpose of this model is to calculate the BER (Bit Error Rate). The final design which supports the different HRP mode for different code rate and different Modulation scheme can take different length of sub-packets which depends on the HRP mode of Transmission. This model also implements the radix-2 FFT algorithm for fixed point FFT processor. Since the FFT processor cannot be used standalone, so in this thesis it is employed in an OFDM Transmitter and Receiver. The goal of this report is to outline the knowledge gained during the master’s thesis project, to describe a design methodology for the OFDM based communication system for high throughput and best error protection. The functionality of each block of the communication system is written in „C‟ code and the output data of each block of Simulink Model is compared to 'C' code written output for the same input.
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    ItemOpen Access
    Design and implementation of 128-point fixed point streaming FFT processor for OFDM based communication system
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2009) Verma, Sunil Kumar; Dubey, Rahul
    Fast Fourier Transform (FFT) processors are today one of the most important blocks in communication systems. They are used in every communication system from broadband to 3G and digital TV to Radio LANs. This master’s thesis project deals with the pipelined, radix-2 algorithmic exploration and the hardware solution for the FFT processor with the FFT size of 2N points, the selection of the scaling schemes based on application requirement is discussed. The designed architecture is functionally verified in Simulink® and the Xilinx® ISE simulator. How to encapsulate the C++ coded algorithms or functions into the Simulink. This FFT processor is used in OFDM based BPSK modulated communication system for the WHD WVAN standard at the Low Rate Physical (LRP) lay. This thesis project presents the design of the 128 point fixed–point F streaming processor. The final architecture used is the SDF (single path with delay feedback) that implements the radix-2 FFT algorithm. Since the FFT processor can’t be used standalone, so in this thesis it is employed in an OFDM Transmitter and the performance is measured for SNR over a range of PAPRs. The goal of this report is to outline the knowledge gained during the master’s thesis project, to describe a design methodology for the fixed point pipelined FFT processors, the scaling choices and how to encapsulate the existing C code into the Simulink environment to measure the performance of fixed-point systems.