Theses and Dissertations

Permanent URI for this collectionhttp://ir.daiict.ac.in/handle/123456789/1

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Subject: search.filters.subject.Data compression

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    Development of difference detection algorithm for surveillance video compression
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2011) Marvaniya, Hitul D.; Banerjee, Asim
    Video surveillance is widely used tool in today’s era for improving public and residential safety. Here the size of the video data is much higher due to large number of surveillance cameras scattered over large area and data needs to be saved for longer time. Thus various compression schemes needs to be implemented to reduce the size of the data. Currently H.264/AVC is widely used as a compression for video surveillance. The computational complexity of H.264/AVC is higher. So the surveillance system is going to be computationally complex and more time consuming. The difference detection algorithm is working as a preprocessing module before video encoder to reduce the complexity of video compression. As proposed algorithm is completely independent from compression module of H.264, it has high adaptability to work with any existing H.264 video encoder to save the cost of implementation.
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    ItemOpen Access
    Video compression using color transfer based on motion estimation
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Reddy, Pandu Ranga M.; Mitra, Suman K.
    Many compression techniques were developed in last decade and are being used in many applications like HDTV, Videoconferencing, Videophone, multimedia work stations and mobile image communications. It is also certain that digital video will have a significant economic impact on the computer, telecommunications, and imaging industries. Compression that is obtained by standard compression schemes for color video can be further increased if we can take the advantage of color information of successive images of a scene. The color of the objects in the present frame will be almost similar to the color of it in previous frame. So color can be applied at decoder, even if the information is not known for all frames of a scene. The main objective of this thesis is to propose schemes for different profiles of MPEG-2 which uses color transfer techniques. The proposed schemes are tested with different sequences and are compared with the MPEG-2 coded sequences.
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    ItemOpen Access
    FPGA implementation of image compression algorithm using wavelet transform
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Rawat, Nitin; Dubey, Rahul
    This work presents FPGA implementation of image compression algorithm by using wavelet transform. Here the emphasis has been made on algorithmic encoding, the first step of image compression problem. The transform that has been used for algorithmic encoding is the „Discrete Wavelet transform‟. The Wavelet family which has been used for this purpose is the „Haar Wavelet family. Various issues involved in hardware implementation of Wavelet Transform such as fractional interpretation, signed Q-format, range of gray scale values, memory requirement and addressing schemes have been discussed. A functional unit has been proposed which calculates the Wavelet transform of input pixel values. An efficient use of „Block RAM‟ present in FPGA has been proposed by placing the initial pixel values and then placing the computed Wavelet transform values back in this memory itself. A suitable way to tackle the issue of storing intermediate wavelet transform values by using a buffer memory has been suggested. This removes the need of having an external memory and thus the time required in accessing this memory reduces drastically. A special emphasis in order to use this memory in accordance with the requirement of image processing algorithms has been made by deriving the necessary addressing schemes. This is done in order to have the correct placement of transformed values in memory. Here we have used the Dual port feature of the Block RAM with one port providing multiple pixel values to the functional unit and other being used to write transformed values one at a time. Along with this, the DCM available in FPGA has been used to address issue of skew and „set up time‟ involved with the clocks in digital design. A delayed version of system clock is sent to memory so that all addresses and enable signals calculated with reference to system clock are stable when active edge of clock is received by memory. All these modules are incorporated in a top module which provides the Wavelet transform of an image. The modelling of the architecture has been done by using Verilog Hardware Description Language and the functional simulation has been done by using Xilinx ISE Simulator. The synthesis of the design has been done by using Xilinx Synthesis Tool (XST) of Xilinx. The total amount of the resources being utilized is reported and it comes out well within reach of Spartan 3E FPGA, our target device. The maximum clock frequency which can be used for the design comes out to be 23 MHz which is quite high for a compute intensive algorithm like Discrete Wavelet Transform.
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    ItemOpen Access
    Low cost design of IFFT module for dolby AC-3 decoder
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Gupta, Akshay Kumar; Dubey, Rahul
    Dolby AC-3 is a flexible audio data compression technology capable of encoding a range of audio channel formats into a low rate bit stream. AC-3 is the de facto audio standard for high-end digital consumer multimedia equipment. In this thesis work we have implemented 8 point FFT module using radix-2 algorithm. This work also shows the implementation of 128 point IFFT module using split radix algorithm.