Theses and Dissertations

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    Single electron transistor based 4-bit ALU design, simulation and optimization
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2015) Joshi, Rathin K.; Parekh, Rutu
    Objective of this thesis work is to create and optimize Single Electron Transistor(SET) based digital design. In present era for electronics, alternative approaches, other than CMOS (like SET,finFET,quantom dot) are much required. This is because of down scaling in MOSFET does not provide efficient results, mainly less than 10 nm feature size. In order to exhibit its applications, SET based digital design of 4-bit multifunctional ALU has been compared with 45 nm CMOS technology. Further using, circuit architecture optimization is performed, which results in significant improvement in design. Entire analysis is done in hierarchical manner: First gate level implementation and its comparison is done, followed by modular performance comparison and finally 4-bit ALU design is compared. So far, no one has done such analysis for design like SET based multifunctional computational tool. Finally, we can conclude that proposed design is energy efficient than 45 nm CMOS or hybrid SET CMOS design. In terms of PDP, SET based optimized design results in 93 % improvment than existing 45 nm CMOS. Transient analysis and PDP analysis have been done in bottom up approach. Low drivabilty and room temeprature operability were the two bottlenecks in SET based design. In this thesis work, design parameters are taken which are appropriate for room temparature, Drivability of SET in increased by modifying circuit architecture. With research advnacement, these two drawbacks have been overcome. In addition to these advantages, all the fabrication parameters are in practically feasible. Hence, proposed design can be fabricated and work at room temprature. SET’s multivalued application has also been verified by considering an example of Qunatizer. Aim behind selecting quantizer is because it is the most basic unit for SET based ADC & DAC circuits. By using only 2 SETs, quantizer is implemented, which is generally bulkier circuit in case of CMOS. This kind of ”Unlike CMOS applications” have few novel benefits with better performance.
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    ItemOpen Access
    GPU-accelerated method of moments
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2015) Soni, Pushtivardhan; Zaveri, Mazad S.
    This work considers the use of commodity graphics processing units (GPUs) for accelerating run-time critical phase of method of moments (MoM) which is a widely used computational electromagnetic (CEM) technique for solving electromagnetic problems governed by an electric field integral equation (EFIE), and ideally suited for radiation and scattering problems. To this end, scattering analysis of metallic bodies with arbitrary shape using standard Rao-Wilton-Glisson (RWG) basis and weighting functions which is a good tradeoff between accuracy and complexity, is considered for the serial and parallel implementations. Among the phases of MoM—assembling impedance matrix and excitation vector, and solving matrix equation—impedance matrix assembly is the most compute intensive phase, and involves massive data-based parallelism; computation of each matrix element requires execution of a common program with unique data set. Therefore the impedance matrix assembly phase is subjected to the GPU acceleration using CUDA that supports single instruction, multiple data (SIMD) paradigm. The results computed shows a good agreement with the reference values computed with commercial software package such as FEKO. From the performance viewpoint, the GPU-based implementation shows a significant speedups over the CPU-only implementation. The linear growth of speedup with respect to number of CUDA threads used to compute matrix element conforms the scalability of the implementation, and indicates the feasibility of greater speedups for larger problems. The peak speedup for the impedance matrix assembly phase of MoM was measured to be about 30 that turn up about 4× faster execution when considering total MoM solution process for the problem and hardware considered. In addition, the comprehensive treatment of the scattering problem in functional analysis framework and the detailed implementation of MoM make this work useful for developing other accelerated implementations of other computational electromagnetic (CEM) methods (i.e., FDTD, FEM).