(Dhirubhai Ambani Institute of Information and Communication Technology, 2023) Nagrani, Khyati; Maiti, Tapas Kumar
This thesis presents the architecture design and implementation of neural networks(NNs) for integrated circuit design. The architecture consists of adders,multipliers, and rectified linear unit (ReLU) blocks. Three architectures, namely,Single-In Single-Out (SISO), Multiple-In Single-Out (MISO), and Multiple-In Multiple-Out (MIMO) are developed. In neural networks, weight values are necessaryand they are supplied from a memory source. The weight values were preparedby training the NNs model on software. Finally, the SISO, MISO, and MIMOneural-networks were taped out. These architectures can be used for intelligentco-processor development.
