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Open Access
ASIC Chip Design For Healthcare System
(Dhirubhai Ambani Institute of Information and Communication Technology, 2022) Nathwani, Nishit; Parekh, Rutu
We presents an application-specific integrated circuit (ASIC) implementation suitable for healthcare applications, which employ RISC-V as a digital processing unit and the sensor interfacing circuits. The motivation for improving living conditions day by day, sensors-based healthcare has been mostly used today era. SoC are used as monitoring tools for well-being or preventive purposes. Healthcare system with ultra low-power System on Chip (SoC) architecture specifically for wearable healthcare system, In order to reduce the power consumption of the processor, we design a ASIC that handles signal processing and provides computation The design consists of two sensors for collecting the force/pressure and ECG signal data. The design of analog circuits is done using the specifications obtained with these sensors. The data obtained can be processed with the computing device to extract information and take desired actions. The RTL-based design of a processor is implemented using Verilog HDL. Logic Equivalence is verified using Xilinx ISE. Physical realizations of the design are obtained using RTL to GDSII design flow. The analog design consists of unity gain buffer, sample and holds circuit, and flash type ADC. We have tested our ASICs with AMS verification methodology using Cadence CAD tools. Operating Frequency of overall system is observed 160 MHz and the area of digital core is 18088.380 ?m2 Total Power dissipation of the core is 368 ?W operating Frequency of analog core is 4 MHz and and area is 468000 and power dissipation is 192.950 mW.
Open Access
Super resolution of Covid-19 CT-Scan Images
(Dhirubhai Ambani Institute of Information and Communication Technology, 2022) Patel, Vaidik Gautam; Gohel, Bakul
Acquisition of high quality CT images is difficult, because it requires exposing patients to high doses of radiation. Super resolution algorithms can help in over coming this problem and obtain higher spatial resolution in CT images. Much deep learning based architecture have been proposed in the literature to overcome this problem. We perform the task of super resolution on a U-Net and study the effects of 2 preprocessing methods which are scaling and zscore. The evaluation strategy for the super resolution of CT images in the literature uses the Peak Signal to Noise Ratio (PSNR) and Structural Similarity (SSIM), however the results are published for the entire image. This is not a good practice for the evaluation of SR, we propose a novel region based similarity measurement practice and a lung specific or region of interest based similarity measurement. We further bifurcate the SSIM metric into it�s 3 component, i.e. luminance, contrast and structure, and study the impact of super resolution on each of these components.
Open Access
Performance enhancement of a pipelined architecture using backup FF
(Dhirubhai Ambani Institute of Information and Communication Technology, 2015) Singh, Shikha; Bhatt, Amit
Commonly used devices like computers and mobile phones demand faster processors. These devices need to live up to the ever growing demand of consumers for performance. Special techniques like Pipelining and Superscalar Architecture increase the performance of processors at the cost of hardware. When using a pipelined architecture, the maximum frequency of operation and hence performance is limited by the longest path between two consecutive Flip Flops, also called the critical path. In designs where the critical path is rarely used, the frequency of operation can be safely increased by employing mechanisms that correct the error introduced if the critical path is taken. One such mechanism using Backup Flip Flop has been discussed and implemented in this dissertation. Problems like Metastability have been analyzed and resolved.
Open Access
Design of architecture of artificial neural network : design and construction of a model for creation of an architecture of artificial neural network based on distributed genetic algorithms
(Dhirubhai Ambani Institute of Information and Communication Technology, 2004) Rahi, Sajid S.; Chaudhary, Sanjay
The objective of the work is to design and construct a model for creation of architecture of feed forward artificial neural network. The distributed genetic algorithms are used to design and construct the system. This thesis describes various encoding schemes suggested by researchers for the evolution of architecture of artificial neural network using genetic algorithm. This research proposes new encoding scheme called object� based encoding for the evolution of architecture and also proposes data structures, genetic operators and repair algorithms for the system development. For evolution of weights during training, genetic algorithm is used. For evolution of weights, two dimensional variable length encoding scheme is proposed. For the same, two-point layer crossover and average crossover are proposed. The experiments are carried out on the developed system for the problems like 3-bit even parity. Which combination of genetic operators are more efficient for better design of artificial neural network architecture, is concluded by the experiments.

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