M Tech Dissertations

Permanent URI for this collectionhttp://ir.daiict.ac.in/handle/123456789/3

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    Indoor Localization Using Ambient Magnetic Fields
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2022) Gupta, Siddhant; Sasidhar, Kalyan
    For over a decade, Indoor Localization has been a crucial topic among researchers. A multitude of localization solutions has been provided so far, including radio frequency based solutions like WiFi, Bluetooth and RFID based localizing and positioning systems. These infrastructure based solutions require a set of additional devices to be installed, which comes with challenges like huge installation costs. These solutions are device dependent. Also, attenuation in signal strength throughout the day leads to a major error in localization. A recent addition to this system is magnetic field based localization techniques. The solution lies in exploiting the ambient magnetic fields present inside buildings and their unique variations caused by the presence of ferromagnetic objects such as pillars, doors, and elevators. Smartphone based built in magnetometers have been the default data sensing platforms. The data collected from smartphones are used by deterministic or probabilistic algorithms for estimating locations. However, the performance of these algorithms depends on the diversity in the sensor models built- in the smartphones, diversity in the users using the phones, and diversity across space and time. There is a dearth of analyses of how these diverse factors affect the performance of magnetic field based solutions. We assess the impact of the four diversity parameters on the dynamic time warping algorithm in estimating the users� location. We discuss our findings from experiments conducted across three different buildings and eight different sensor models with five users.
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    ItemOpen Access
    1.5V, 2.4GHz highly linear CMOS downconversion mixer
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Kumar, Ch. Uday; Parikh, Chetan D.
    In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This thesis explores low voltage low power RFIC design for CMOS mixer through their applications in a RF front-end transceiver.A highly linear CMOS down-conversion mixer is designed to operate at 1.5V for single battery solution. Mixer perform frequency down-conversion from a 2.4GHz radio frequency (RF) input signal to a 100MHz intermediate frequency (IF) output signal. The mixer circuit has been simulated in TSMC 0.18μm CMOS technology. Low voltage operation is achieved by using a folded cascode topology. The mixer uses a wide range constant gm cell at input RF stage to increase the linearity (IIP3) performance. The proposed mixer has 0.92dB conversion gain, 17.7dB noise figure, 3.08 1 dB compression point (P-1 dB), 13.8dBm third-order input intercept point (IIP3) and consumes 8.1mW DC power at 1.5V supply voltage. The design ensures that all the transistors remain in saturation, and mixer does perform satisfactorily for +/-50mV variation of the threshold voltage from the nominal value for both NMOS and PMOS transistors. The mixer is simulated for +/- 50mV threshold voltage variations for both NMOS and PMOS transistors. Temperature effects on this circuit were also investigated.