M Tech Dissertations

Permanent URI for this collectionhttp://ir.daiict.ac.in/handle/123456789/3

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Now showing 1 - 6 of 6
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    Path complexity of maximum segment sum problem
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2009) Mishra, Devesh; Amin, Ashok T.
    Various software complexity metrics have been proposed in literature. A program complexity measure called path complexity is proposed in [1]. Path complexity P(A,n) of an algorithm A is defined to be the number of program execution paths of A over all inputs of size n. It defines a partition of input space of program A into equivalence classes on the basis of different program execution paths. All the inputs belonging to an equivalence class are equivalent to each other in a sense that they follow same execution path. We present path complexity analysis of four different algorithms for one-dimensional maximum segment sum problem which shows that algorithms with different computational complexity may be equivalent to each other in their path complexity. We also present lower bounds on one dimensional as well as two dimensional maximum segment-sum problems. A different perspective and several observations on one dimensional problem are given
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    Collaborative filtering approach with decision tree technique
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Srivastava, Anit; Jotwani, Naresh D.
    Rapid advances in data collection and storage technology has enabled organizations (especially e-commerce) to accumulate vast amounts of data. The amount of data kept in computer files and databases is growing at a phenomenal rate because customers are evolving to use e- commerce services. So processing of large number of coustomer’s past purchase records is becoming a new challenge in e-commerce. The primary goal of e-commerce services is to build the systems where customers can get their likely recommended products relevant to their past purchase. We have implemented collaboratives filtering with supervised learning techniques. One of supervised learning techniques is Decision Tree. We have used Decision Tree to cluster similar type of customers according to active customer preferences (or tastes). In our new approach, a collaborative filtering based recommender system will recommended Top-k likely products according to customers preferences (or tastes) by considering past purchase record (or implicit ratings) of its clustered customers. This system will also recommend or predict Top-k likely products to particular customers by considering the cases when clustered customers have given explicit ratings (or votes) to their previously purchased products.
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    FPGA implementation of direct sequence spread spectrum techniques
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Choudhary, Vivek Kumar; Dubey, Rahul
    This work presents the performance, noise analysis and FPGA implementation of Direct Sequence Spread Spectrum technique. Performance of signal increases as increasing parity bits in Hamming code algorithm. Increasing parity noise goes reduce therefore received signal close to its original value, but adding parity band-width requirement also increases. This work is bases on the IS-95 standard for CDMA (Code Division Multiple Access) Digital Cellular.
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    Design of low power and high speed decoder for 1MB memory
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Gupta, Punam Sen; Nagchoudhuri, Dipankar
    Technology scaling is accompanied by rise in leakage power dissipation. This thesis proposes a voltage controllable circuit in the feedback path of the decoder, which drastically reduces the standby leakage current with minimum loss in speed and slightly overheads in terms of chip area. This circuit generates slightly lower supply voltage when the load circuitry is in the standby mode thereby raises the Vt of the CMOS transistors and hence reduces leakage power dissipation The overall power dissipation of a 7x128 decoder is reduced from 0.928mW to 0.584mW for 1Mb Memory with voltage controllable circuit, namely 37% lowering in power dissipation. The operating voltage for the design is 1.2 V. Layout is done in magic 7.1 version in 180nm technology. The simulations are done in LT spice.
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    Study of algebraic and state based testing techniques
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2007) Praveen, Asim Rama; Kapoor, Kalpesh
    Sequential programs can be modeled as algebra or transitions on a state space. Whether a program is implemented according to its model is the question addressed by program testing. The thesis illustrates issues in constructing a finite test set from algebraic and state transition based specifications. Test hypotheses need to be formulated to generalise results of testing from a finite test set to the entire input domain of a program under test. It is demonstrated with examples that test hypotheses are constraints on program under test. Testing can lead to sound conclusions for the class of programs that satisfy the constraints. The theory proposed in [BGM91] is used to illustrate test selection from algebraic specifications. Z notation is used to express state transitions of a heap sort example that illustrates testing from state based specifications.
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    Two-level pricing scheme for congestion control and service differentiation in the Internet
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2006) Kulkarni, Vineet; Srivastava, Sanjay; Lenin, R.B
    It is the property of any good service provider that, if a user is ready to pay for the services he demands, the provider will ensure that the requested level of service is made available. Is this possible in the Internet? The answer is No. This is because there is no uniform economic model based on which service is provided in the Internet. Through pricing, we provide one such model which is sensitive to user demands and budgets. The proposed pricing mechanism performs the dual functions of providing service differentiation according to budgets, and doing congestion control through feedback at time scale comparable to a round trip time. We investigate the optimal rate allocation and stability issues of the proposed scheme. A two level pricing scheme is proposed to reflect the structure of the Internet. Data statistics are maintained as an aggregate, thus reducing the load on intermediate routers in the Internet. The scheme has been proposed so as to require minimal changes to the current Internet. The working of the pricing scheme in different traffic scenarios is demonstrated through simulations.