Chip level simulation for timing analysis of a target micro controller

Abstract

Recent advancements in the automobile industry and the exponential development of the semiconductor industry has led to a new paradigm of the automobile, called Automatic vehicle. In this paradigm, the integration of more and more number of ECU has been adopted to meet the technology node of the current generation. Increase in the number of ECU causes the controlling unit to be more complex as the IP count in the MCU’s SoC increases drastically. With increase in MCU hardware, the embedded software has become more complex. Testing of such complex software needs to be more accurate in every aspect starting from functionality to its performance. There are many cases where it has been observed that due to some performance miss-match the real hardware gets burned. To prevent the issue related to testing of embedded code in real hardware, a new technique has been adopted. The technique is to make the cycle-accurate virtual prototype of the target micro-controller and test the embedded code in it to get the performance analysis before testing the code in real hardware. The virtual testing of the embedded code can help us in real-time testing for performance and also save the cost of development.