Design of low power and high speed comparator with DG-MOSFET

Abstract

This thesis is about design of low power and high speed comparator with Double Gate- Metal Oxide Semiconductor Field Effect Transistor (DG-MOSFET) in 32 nm technology node. Low power is the requirement in implanted biomedical devices which consists of data converters. Low power and high speed is the important parameter in signal processing which consists of data converters. Hence power and speed became a critical parameter to optimize in data converters and memory applications to increase the battery life by reducing its energy consumption. Here, this dissertation describes a dynamic comparator which can be operated with a clock frequency of 3.5 GHz. It takes delay of 35.12 ps, an average power of 6.19 W in reset phase and 8.16 W in comparison phase at a clock frequency of 1 GHz. The external positive feedback uses the multi-vt property of DG-MOSFET that is the dependence of rst gate voltage on second gate bias voltage, to reduce the regeneration time.