Area reduction in 8 bit binary DAC using current multiplication
Date
Authors
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Publisher
Dhirubhai Ambani Institute of Information and Communication Technology
Abstract
A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then current multiplication is performed to get the desired output.
Compare to the conventional binary current steering Digital-to-Analog Converters, 20.66% area is reduced and static errors are found within limit. Maximum Integral nonlinearity is-18μA (< LSB) and Differential nonlinearity5.02 μA (< LSB).
Description
Keywords
Analog-to-digital converters, Digital-to-analog converters, Design and construction, Electronic circuit design, Microwave integrated circuits, Linear integrated circuits, Microwave equipment circuits
Citation
Upraity, Maitry (2007). Area reduction in 8 bit binary DAC using current multiplication. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 30 p. (Acc.No: T00117)